1. Field of the Invention
The present invention is related to a metal capacitor and a method of making the same, and more particularly, to a structure and a method of improving the capacitance of a metal-oxide-metal (MOM) capacitor.
2. Description of the Prior Art
As the complexity and integration of integrated circuits continues to increase, the size of semiconductor elements becomes smaller and smaller. This has led to a reduction in the overall size of capacitors with the result that the corresponding capacitance is also reduced. Generally, there are three effective ways to improve the capacitance through circuit design. The first way is to decrease the separation between the capacitor electrodes. The second way is to increase the surface area of each capacitor electrode. The third way is to use a dielectric material with a high dielectric constant in the capacitor dielectric layer.
Commonly used capacitors include the metal-insulator-metal (MIM) capacitor, metal-oxide-metal (MOM) capacitor and metal-insulator-silicon (MIS) capacitor. The fabricating process of a MOM capacitor can be integrated with the interconnect process; hence no extra photomask is required. Therefore, the MOM capacitor is the most commonly used capacitor in the semiconductor field.
Methods to increase the capacitance of the MOM capacitor are well-known in the art: for instance, arranging the capacitor electrodes in a stack structure to replace the planar capacitors or placing the capacitor electrodes in a comb-like structure to increase the surface area of the capacitor electrode. However, because modern electronic devices are built at the nano scale, the size of the MOM capacitor has to be scaled down. Under this condition, increasing the surface area of the MOM capacitor electrode can no longer provide enough capacitance.
As mentioned above, besides the surface area of the capacitor electrode, the capacitance of the capacitor is also in direct proportion to the dielectric constant of the capacitor dielectric layer. Therefore, increasing the dielectric constant of the capacitor dielectric layer is another possible way to improve the capacitance of the MOM capacitor.
However, in order to avoid RC delay and parasitic capacitance, a metal wire with a low resistance is used in the metal interconnection and a dielectric layer with low dielectric constant is positioned between the metal wires. To integrate the interconnect process, the MOM capacitor and the metal interconnection are usually formed in the same dielectric layer. That is, the MOM capacitor is formed in the dielectric layer with low dielectric constant in order to integrate the fabricating process and avoid RC delay. This, however, results in the capacitance of the MOM capacitor being compromised.
Therefore, the reduced surface area of the capacitor electrode and the low dielectric constant of the capacitor dielectric layer deteriorate the capacitance of the MOM capacitor. Accordingly, a method of fabricating a metal capacitor which can both overcome the RC delay and improve the capacitance is demanded.